Electronic device with surge suppression unit

ABSTRACT

An electronic device includes a power input pin receiving a voltage from an external power supply, a load, and a surge suppression unit connected between the power input pin and the load. The surge suppression unit includes a first transistor, a voltage divider circuit and a capacitor. The first transistor includes a control end, a first conducting end connected to the power input pin, and a second conducting end connected to the load. The voltage divider circuit includes a common node connected to the control end, one end of the voltage divider circuit connected between the first conducting end and the power input pin, and the other end of the voltage divider circuit connected to ground. One end of the capacitor is connected between the second conducting end and the load, and the other end of the capacitor is connected to the control end.

BACKGROUND

1. Technical Field

The present disclosure relates to surge management, and more particularly, to an electronic device with a surge suppression unit.

2. Description of Related Art

Capacitors and induction coils are basic electronic components of an electronic device. However, when the electronic device is instantaneously connected with an external power supply, initial voltage applied to the capacitors rises so fast that a current surge may be generated. In addition, when the external power supply is instantaneously disconnected from the electronic device, self induction of the induction coils may occur, and a voltage surge or current surge is generated. The current surge or voltage surge may result in a tenfold or even hundredfold spike, deteriorating performance of the electronic components, shortening lifetime of the electronic device, or even permanently disabling the device.

What is needed, therefore, is an electronic device which can overcome the described limitations.

BRIEF DESCRIPTION OF THE DRAWINGS

The components in the drawings are not necessarily drawn to scale, the emphasis instead placed upon clearly illustrating the principles of at least one embodiment. In the drawings, like reference numerals designate corresponding parts throughout the various views.

FIG. 1 is a schematic block diagram of an electronic device according to a first embodiment of the present disclosure.

FIG. 2 is a schematic block diagram of an electronic device according to a second embodiment of the present disclosure.

FIG. 3 is a schematic block diagram of an electronic device according to a third embodiment of the present disclosure.

DETAILED DESCRIPTION

Reference will now be made to the drawings to describe certain exemplary embodiments of the present disclosure in detail.

Referring to FIG. 1, a schematic diagram of an electronic device 100 according to a first embodiment of the present disclosure is shown. The electronic device 100 includes a power input pin 10, a surge suppression unit 20 and a load 30. The load 30 includes many basic electronic components (not shown), such as capacitors and induction coils. The surge suppression unit 20 is connected between the power input pin 10 and the load 30, and is configured to suppress a current surge or voltage surge.

The surge suppression unit 20 includes a voltage divider circuit 21, a first transistor Q₁, a first capacitor C₁, a second capacitor C₂, a sensing electrode pin 22, a bias resistor R₃, a discharging resistor R₄, and a second transistor Q₂. The voltage divider circuit 21 includes a first voltage dividing element 24 and a second voltage dividing element 25 connected in series. A common node M is defined between the first voltage dividing element 24 and the second voltage dividing element 25. The first transistor Q₁ includes a control end G₁, a first conductive end S₁, and a second conductive end D₁. The second transistor Q₂ includes a control end G₂, a first conductive end S₂, and a second conductive end D₂. In the embodiment, the first and second voltage dividing elements 24, 25 can, for example, be resistors.

One end of the power input pin 10 is connected to an external power supply 1, and the other to the first conductive end S₁ of the first transistor Q₁. The voltage divider circuit 21 is connected between the first conductive end S₁ of the first transistor Q₁ and ground. The control end G₁ of the first transistor Q₁ is connected to the common node M. The first capacitor C₁ is connected between the second conductive end D₁ and the control end G₁ of the first transistor Q₁. The second capacitor C₂ is connected between the second conductive end D₁ of the first transistor Q₁ and ground. The second conductive end D₁ of the first transistor Q₁ is further connected to the load 30. The first conductive end S₂ of the second transistor Q₂ is connected to the control end G₁ of the first transistor Q₁ via the discharging resistor R₄. The second conductive end D₂ of the second transistor Q₂ is connected to ground. The control end G₂ of the second transistor Q₂ is connected to ground via the bias resistor R₃. One end of the sensing electrode pin 22 is connected to the external power supply 1, and the other end of the sensing electrode pin 22 is connected to the control end G₂ of the second transistor Q₂. In the illustrated embodiment, both the power input pin 10 and the sensing electrode pin 22 can, for example, be rectangularly shaped, with the power input pin 10 longer than the sensing electrode pin 22. Especially, both the power input pin 10 and the sensing electrode pin 22 can, for example, be two terminals of an electronic connector connected to the external power supply 1. The first transistor Q₁ can, for example, be an n-channel field-effect transistor (FET), the second transistor Q₂ can, for example, be a p-channel FET, wherein the control ends G₁, G₂, the first conductive end S₁, S₂, and the second conductive end D₁, D₂ thereof correspond to a gate electrode, a source electrode and a drain electrode, respectively. In alternative embodiments, the discharging resistor R₄ can be omitted.

Operation of the electronic device 100 is as follows.

When the electronic device 100 is connected to the external power supply 1, the power input pin 10 is connected to the external power supply 1 prior to the sensing electrode pin 22, due to its length. As soon as the power input pin 10 is connected to the external power supply 1, the first capacitor C₁ is accordingly charged by the external power supply 1 via the voltage divider circuit 21 irrespective of whether the sensing electrode pin 22 is connected to the external power supply 1. An electric potential of a polar plate of the first capacitor C₁ connected to the control end G₁ of the first transistor Q₁ increases gradually.

When the electric potential reaches a certain value, the first transistor Q₁ is switched on. Accordingly, a voltage output by the external power supply 1 is gradually applied to the load 30 via the first transistor Q₁ at the time when the electronic device 100 is connected to the external power supply 1. Therefore, a current surge can be suppressed. The second capacitor C₂ is charged by the external power supply 1 via the first transistor Q₁, in order to stabilize the voltage applied to the load 30.

In addition, during the time after the power input pin 10 is connected to the external power supply 1 and before the sensing electrode pin 22 is connected to the external power supply 1, the control end G₂ of the second transistor Q₂ is connected to ground via the bias resistor R₃, and an electric potential of the control end G₂ is substantially equivalent to 0V. The first conductive end S₂ of the second transistor Q₂ is connected to the common node M via the discharging resistor R₄, and an electric potential of the first conductive end S₂ is higher than 0V. Therefore, the second transistor Q₂ is switched on, and the discharging resistor R₄ is connected in parallel to the second voltage dividing element 25 via the second transistor Q₂. After the sensing electrode pin 22 is connected to the external power supply 1, the electric potential of the control end G₂ is disconnected to the second voltage dividing element 25.

Once the external power supply 1 is disconnected from the electronic device 100, the sensing electrode pin 22 is disconnected from the external power supply 1 prior to the power input pin 10, because the sensing electrode pin 22 is shorter than the power input pin 10. Accordingly, during the time before the power input pin 10 is disconnected from the external power supply 1 and after the sensing electrode pin 22 is disconnected from the external power supply 1, the second transistor Q₂ is switched on. The first capacitor C₁ discharges via the discharging resistor R₄ and the second transistor Q₂. Therefore, the electric potential of the polar plate of the first capacitor C₁ connected to the control end G₁ of the first transistor Q₁ decreases, and correspondingly, the first transistor Q₁ varies from on to a little switching-off state or even off before the power input pin 10 is disconnected from the external power supply 1, as long as the discharging resistor R₄ is appropriately chosen. Therefore, the voltage applied to the load 30 via the first transistor Q₁ does not decrease sharply when the power input pin 10 is disconnected from the external power supply 1. Accordingly, a voltage surge can be suppressed. After the power input pin 10 is disconnected from the external power supply 1, the external power supply 1 stops providing the voltage to the electronic device 100.

According to the operation described above, when the electronic device 100 having the surge suppression unit 20 is connected to the external power supply 1, the first capacitor C₁ is charged by the external power supply 1, and the first transistor Q₁ shifts from off to on. Accordingly, the voltage output from the external power supply 1 is applied to the load 30 with a time delay. Therefore, when charging instantaneously, the surge suppression unit 20 can prevent the load 30 from being damaged by a current surge, thereby protecting the electronic device 100.

Furthermore, when the electronic device 100 is instantaneously disconnected from the external power supply 1, the sensing electrode pin 22 is disconnected from the electronic device 100 prior to the power input pin 10. The second transistor Q₂ is switching on during the time before the power input pin 10 is disconnected from the external power supply 1 and after the sensing electrode pin 22 is disconnected from the external power supply 1. Accordingly the first capacitor C₁ discharges via the discharging resistor R₄, and correspondingly, the first transistor Q₁ shifts from on to off. Therefore, the voltage output to the load 30 does not decrease sharply when the power input pin 10 is disconnected from the external power supply 1. Therefore, the surge suppression unit 20 can further prevent the load 30 from being damaged by a voltage surge, thereby protecting the electronic device 100.

Referring to FIG. 2, an electronic device 200 according to a second embodiment of the present disclosure differs from the electronic device 100 of the first embodiment in that a first capacitor C₁ of a surge suppression unit 50 is connected between a control end G₁ of a first transistor Q₁ and ground.

Referring to FIG. 3, an electronic device 300 according to a third embodiment of the present disclosure differs from device 200 of the second embodiment in that the second voltage dividing element (not labeled) of a surge suppression unit 80 is omitted.

Operations of the electronic devices 200, 300 are also similar to the operation of the electronic device 100.

It is to be further understood that even though numerous characteristics and advantages of a preferred embodiment have been set out in the foregoing description, together with details of the structures and functions of the embodiments, the disclosure is illustrative only; and that changes may be made in detail, especially in matters of shape, size and arrangement of parts within the principles of disclosure to the full extent indicated by the broad general meaning of the terms in which the appended claims are expressed. 

1. An electronic device, comprising: a power input pin selectively connected to or disconnected from an external power supply; a load; and a surge suppression unit connected between the power input pin and the load, the surge suppression unit comprising: a sensing electrode pin selectively connected to or disconnected from the external power supply; a voltage divider circuit having a common node; a first capacitor charged by the external power supply via the common node of the voltage divider circuit; a first transistor connected between the power input pin and the load, and the first transistor being switched on or switched off according to the change of an electric potential of the first capacitor, a second transistor connected between the first transistor and ground, and the second transistor being switched on or switched off according to a voltage provided by the sensing electrode pin; wherein the second transistor varies from off to on upon the condition that a time when the sensing electrode pin is disconnected from the external power supply is previous to a time when the power input pin is disconnected from the external power supply.
 2. The electronic device of claim 1, wherein the first transistor comprises a control end, a first conducting end and a second conducting end, the control end being connected to the common node, the first conducting end being connected to the power input pin, the second conducting end being connected to the load, and the first capacitor being connected between the control end and the second conducting end of the first transistor.
 3. The electronic device of claim 2, wherein the second transistor comprises a control end, a first conducting end and a second conducting end, the control end of the second transistor being connected to the sensing electrode pin, the first conducting end of the second transistor being connected to the control end of the first transistor, and the second conducting end of the second transistor being connected to ground.
 4. The electronic device of claim 3, wherein the surge suppression unit further comprises a bias resistor connected between the control end of the second transistor and ground.
 5. The electronic device of claim 4, wherein the surge suppression unit further comprises a discharging resistor connected between the control end of the first transistor and the first conducting end of the second transistor.
 6. The electronic device of claim 4, wherein the voltage divider circuit comprises a first voltage dividing element and a second voltage dividing element connected with the first voltage dividing element in series, and the common node is defined between the first voltage dividing element and the second voltage dividing element.
 7. The electronic device of claim 1, wherein the first transistor comprises a control end, a first conducting end and a second conducting end, the control end being connected to the common node, the first conducting end being connected to the power input pin, the second conducting end being connected to the load, and the first capacitor being connected between the control end of the first transistor and ground.
 8. The electronic device of claim 7, wherein the second transistor comprises a control end, a first conducting end and a second conducting end, the control end of the second transistor being connected to the sensing electrode pin, the first conducting end of the second transistor being connected to the control end of the first transistor, and the second conducting end of the second transistor being connected to ground.
 9. The electronic device of claim 8, wherein the surge suppression unit further comprises a bias resistor connected between the control end of the second transistor and ground.
 10. The electronic device of claim 9, wherein the voltage divider circuit comprises a first voltage dividing element connected between the first conducting end of the first transistor and the common node.
 11. The electronic device of claim 10, wherein the voltage divider circuit further comprises a second voltage dividing element connected between the common node and ground.
 12. The electronic device of claim 9, wherein the surge suppression unit further comprises a discharging resistor connected between the control end of the first transistor and the first conducting end of the second transistor.
 13. The electronic device of claim 9, wherein the surge suppression unit further comprises a second capacitor connected between the second conducting end of the first transistor and ground.
 14. The electronic device of claim 1, wherein the power input pin and the sensing electrode pin are both rectangularly shaped, and the power input pin is longer than the sensing electrode pin.
 15. The electronic device of claim 1, wherein the first transistor is an n-channel field-effect transistor, and the second transistor is a p-channel field-effect transistor.
 16. An electronic device, comprising: a power input pin receiving a voltage from an external power supply; a load; and a surge suppression unit connected between the power input pin and the load, comprising: a first transistor comprising a control end, a first conducting end connected to the power input pin, and a second conducting end connected to the load; a voltage divider circuit comprising a first voltage dividing element, a second voltage dividing element connected with the first voltage dividing element in series, and a common node defined between the first voltage dividing element and the second voltage dividing element, the common node being connected to the control end, one end of the first voltage dividing element being connected between the first conducting end of the first transistor and the power input pin, and the other end of the first voltage dividing element being connected to the common node, and one end of the second voltage dividing element being connected to the common node, and the other end of the second voltage dividing element being connected to ground; and a capacitor, one end of the capacitor being connected between the second conducting end of the first transistor and the load, and the other end of the capacitor being connected to the control end of the first transistor.
 17. The electronic device of claim 16, wherein the first transistor is an n-channel field-effect transistor.
 18. An electronic device, comprising: a power input pin receiving a voltage from an external power supply; a load; and a surge suppression unit connected between the power input pin and the load, comprising: a first transistor, comprising a control end, a first conducting end connected to the power input pin, and a second conducting end connected to the load; and a first voltage dividing element, one end of the first voltage dividing element being connected to between the power input pin and the first conducting end of the first transistor, and the other end of the first voltage dividing element being connected to the control end of the first transistor; and a capacitor, one end of the capacitor being connected between the second conducting end of the first transistor and the load, and the other end of the capacitor being connected to the control end of the first transistor.
 19. The electronic device of claim 18, wherein the surge suppression unit further comprises a second voltage dividing element connected between the control end of the first transistor and ground.
 20. The electronic device of claim 18, wherein the first transistor is an n-channel field-effect transistor. 